Virage Logic | Products & Solutions

ASAP Logic™ – the ASAP Standard Cell Libraries deliver up to 30 percent area improvement over conventional standard cells. ASAP Metal Programmable Cell Libraries save configuration costs by reprogramming only a few masks. ECO Cell Libraries use Virage Logic's proprietary metal programmable technology to provide a high level of flexibility in implementing engineering changes in standard cell designs.

SiWare™ Memory – the SiWare Memory product line of silicon aware compilers provides the world’s most power-optimized memories for advanced processes at 65nm and 45nm. These high performance memory compilers minimize both static and dynamic power consumption and provide optimal yields SiWare High-Density memory compilers are optimized to generate memories with the absolute minimum area. SiWare High-Speed memory compilers are designed to help designers achieve the most aggressive critical path requirements.

SiWare™ Logic – the SiWare Logic product line includes yield-optimized standard cells for a wide variety of design applications at 65nm and 45nm with multiple threshold process variants. SiWare logic libraries are offered using three separate architectures to optimize circuits for Ultra-High-Density, High-Speed, or general use. SiWare Ultra-Low-Power extension libraries provide designers with the most advanced power management capabilities.

ASAP Memory™ – the ASAP Memory product line provides the largest selection of silicon-proven embedded memories designed for testability and manufacturability. The ASAP Memory product line is comprised of three separate families. The High-Density family consists of memory compilers optimized to generate memories for area. The High-Speed family contains memory compilers optimized to generate memories for speed applications. The Ultra-Low-Power product line is comprised of memory compilers optimized for battery-powered and hand-held applications.

The STAR Memory System, when used in conjunction with the STAR Yield Accelerator, provides a complete RTL to test floor embedded memory test and repair solution. An open memory interface gives SoC designers the freedom to use the system's capabilities with their choice of Virage Logic memories, other commercially available third-party memories or internally developed embedded memories. Created to reduce time-to-tapeout and accelerate time-to-volume, the STAR Yield Accelerator bridges the design and manufacturing disciplines to enable automated test vector generation, silicon debug, fault isolation and classification to be used at the critical semiconductor characterization, bring-up, volume manufacturing and electrical failure analysis stages.

NOVeA® – provides embedded non-volatile memory on industry standard 180- to 90nm CMOS processes, with no additional masks or special process steps required, at leading foundries and IDMs. Available from 32 to 16Kbits, NOVeA is ideal for implementing security and encryption keys for Digital Rights Management (DRM) in high volume consumer applications including set top boxes, DVD players/recorders, MP3 players, and Flash memory cards. NOVeA’s low power, compact design also makes it an ideal solution for passive RFID, analog trimming, Zigbee, device personalization and silicon repair.

STAR Memory™ – the Self-Test and Repair (STAR) Memory product line provides embedded memories designed for testability and manufacturability to optimize yield. Building on the ASAP Memory product line, STAR memories include redundancy capabilities for repair purposes. STAR Memory products are an integral component of the STAR Memory System.

IPrima® Foundation – the IPrima Foundation product line provides IP platforms optimized for specific foundry processes. Each IPrima Foundation platform includes ASAP memories, the ASAP logic libraries, and base I/Os IPrima Foundation customers have optional access to Virage Logic's rich portfolio of highly differentiated IP products.

Intelli™ DDR - the Intelli DDR memory product family offers the highest performance, lowest latency intelligent memory controllers for DDR1, DDR2, and DDR3, the lowest power, highest bandwidth Mobile SDR/Mobile DDR memory controllers, full featured Graphics DDR (GDDR) memory controllers, high-speed, full digital DDR SDRAM PHY+DLL solutions and memory models for popular DRAM parts.

Intelli™ PHY+DLL - the Intelli PHY+DLL companion for the Intelli DDR memory products is a full-digital DDR SDRAM PHY+DLL hard macro (GDSII) solution optimized for high frequency operation as well as small die size.

Intelli™ Models - the Intelli Models provide flexible, easy to use, vendor independent simulation models for popular DRAM devices that enable designers to verify the functionality of an entire memory sub-system.

Virage Logic’s emPROM™ (embedded multi-time Programmable Read Only Memory) Memory System - is a high-density non-volatile memory (NVM) system that provides a secure, fully-integrated solution for embedded code-storage applications ranging from 16Kbits to 16Mbits.

AEON® Embedded NVM - the Virage Logic and Impinj combined product line establishes the industry’s broadest logic NVM IP product portfolio ranging from 250- to 65-nm solutions, servicing markets ranging from high volume consumer and industrial to automotive and security conscious applications including military.