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1) What industry are you designing in?
 
 Other
2) Indicate your target tape out date
 
3) How many projects do you expect to start over the next 12 months?
 
4) What is your main design methodology? (Check all that apply)
Cadence
Magma
Mentor
Synopsys
Other
5) Which foundries are you interested in? (Check all that apply)
Chartered
Dongbu Electronics
IBM
SilTerra
SMIC
Tower
TSMC
UMC
Other
6) Are you interested in obtaining access to any of the following downloadable items?
Dongbu Electronics Front-End Desgin Kit?
  Yes No
SMIC Front-End Design Kit?
  Yes No
TSMC Library Distribution Program?
  Yes No
Tower Front-End Design Kit?
  Yes No
7) What process technology are you using today?
 
 Other
8) What process technology will you be using in the next 12 months?
 
 Other
9) What IP are you looking for? (Check all that apply)
Integrated Semiconductor IP Platform
Standard Cell Library
Metal Programmable Libraries
Base I/Os
High-Speed Specialty I/Os
Memory Blocks
Other
10) What type of IP are you primarily interested in?
 
11) What criteria is most important to you? (Check All that Apply)
Area
Speed
Power
Yield/DFM
Functionality
Reliability
Cost
Security
Time-to-Market
12) How much aggregate memory is on your chip?
 
13) What is the chip operating frequency?
14) How many unique memory configurations are you interested in?
 
15) What types of memory are you considering for this project?
Single Port, Dual Port
Register File
ROM
Memories with redundancy/repair
Content Addressable (Binary or Ternary CAM's)
Multi Ports
# of read ports  
# of write ports  
Non-Volatile Memory
Other
16) Would you like to subscribe to other Virage Logic information?
IP Times monthly e-newsletter
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Product Information
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