Virage Logic

Virage Logic

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September 2008

Welcome to the September 2008 issue of the newly redesigned IP Times – your continuing source for semiconductor Intellectual Property (IP) news, trends, and developments. This is your opportunity to learn about Virage Logic’s latest news and upcoming events.

Resource Center

New Look Unveiled! Virage Logic Introduces Refreshed Corporate Web Site
If you have visited www.viragelogic.com recently, you have noticed that Virage Logic’s Corporate web site has an updated look and feel. Gone is the hiker guy who helped us to proceed with confidence from 180-nanometers (nm) and below and accelerate silicon success.

Now Virage Logic is leading the way with an even broader portfolio of highly differentiated advanced semiconductor IP solutions including embedded SRAM and non-volatile memory (NVM), logic libraries, embedded test and repair, memory development software, and DDR memory controllers. As the semiconductor industry’s trusted IP partner, foundries, IDMs and fabless customers rely on Virage Logic to achieve higher performance, lower power, higher density and optimal yield, as well as shorten time-to-market and time-to-volume. Check it out.

Register Early! STAR™ Memory System Class – October 28-29, 2008
Reserve your space now for this extensive two-day course featuring lectures, hands-on tutorials, and labs that instruct you on how to integrate the STAR Memory System into your System-on-Chip (SoC) designs and accelerate your silicon success. STAR Memory System customers have improved yields by up to 250%. The STAR Memory System features an open memory interface giving designers the freedom to use the system's capabilities with their choice of Virage Logic memories, other commercially available third-party memories or internally developed embedded memories so don’t miss this opportunity to learn how you can effectively implement this solution to help increase yields. Seating is limited. Register Now.

Featured VIP Partner White Paper – Ensuring Power Integrity Most Efficiently
Virage Logic is pleased to feature this informative white paper from our partners, Cadence Design Systems. Learn more about "where and how" to apply power rail analysis to help save time in the power planning and verification process. Read the white paper.

Virage Logic in the News

Virage Logic and TSMC Expand Agreement to Provide Process Optimized IP
TSMC and Virage Logic have extended their agreement to provide end-market process optimized IP for SoC designs. Under the expanded agreement, Virage Logic will develop physical IP, such as embedded memories and logic libraries, for both new and optimized processes ranging from 180nm to 40nm. The collaboration enables Virage Logic and TSMC to more quickly meet its customers’ shifting and stringent application-specific requirements. Read more.

Virage Logic’s Expanded Business Model Addresses Semiconductor Market’s Growing Need to Meet Application-Specific Requirements
Virage Logic recently announced an expanded business model initiative with its strategic foundry partners, Chartered and IBM, to provide foundry-sponsored IP optimized for key end-markets. Read the article.

NextIO Names Virage Logic as Trusted IP Partner for 65-Nanometer Embedded Memories
Provider of I/O gateway virtualization solutions, NextIO, has selected Virage Logic's SiWare™ 65GP High-Density Memory Compilers and the Self-Test and Repair (STAR™ Memory System for use in its next-generation product portfolio. Read more.

Analog Devices Selects Virage Logic’s AEON® Non-Volatile Memory Technology for High-Reliability Applications
Virage Logic recently announced that Analog Devices has licensed the company's AEON embedded non-volatile memories (NVM) for use in a broad range of analog and mixed-signal products. Qualified for use in a range of demanding environments, AEON memory features ultra high yield and reliability and is designed to operate over a wide temperature range with a minimum 10-year data retention. Learn more.

Virage Logic Strengthens Management Team with Key Appointments
Recently the company announced key appointments to strengthen its management team and lay the foundation for continued strong growth. Brian Sereda, a seasoned technology and semiconductor industry financial executive, joined the company as vice president of finance and chief financial officer (CFO). Read more.

Upcoming VIP Partner Events

Virage Logic’s VIP Partner Program brings together technology and business alliances with our industry partners for the benefit of our mutual customers. As part of the VIP Partner Program, Virage Logic supports our partners’ global events, such as the ones listed below.

Common Platform Tech Forum 2008
September 30
, 2008  
Santa Clara Convention Center, Santa Clara, CA
Join Virage Logic at the Common Platform Tech Forum, hosted by Chartered, IBM and Samsung. This event helps promote greater interaction among the industry’s partners and customers. Come and learn how Virage Logic works with the Common Platform to support mutual customers’ manufacturing needs with advanced technologies and silicon-proven semiconductor IP. Learn more.

Power Forward Initiative (PFI) Low-Power Summit
October 1, 2008
Cadence Design Systems, San Jose, CA
The PFI is hosting a free one-day Low-Power Design Summit to share best practices and proven capabilities for energy-efficient wireless and wired electronics. Virage Logic’s Executive VP of Marketing, Brani Buric, will be a featured panelist discussing "Deploying Low Power – What are the Challenges?" Virage Logic will also be featured presenting, "Minimizing Design Complexity with Power Optimized Physical IP." And be sure to visit the Virage Logic booth to meet our IP experts who will be on hand to discuss your low-power needs. Learn more.

Synopsys Users Groups (SNUG) – Europe & Japan
October 7-8, 2008
Kempinski Airport Hotel, Munich, Germany

October 17
, 2008  
Tokyo Conference Center Shinagawa, Tokyo, Japan
If you plan to attend SNUG in either Munich or Tokyo, be sure to visit Virage Logic’s Gold Sponsor booth at the Interoperability Fair to meet with the industry’s top IP experts and learn more about the company’s broad portfolio of silicon proven semiconductor IP. Register Now.

TSMC 2008 Technology Symposiums – China & Japan
October 14, 2008
Shangri-La Hotel, Beijing, China

October 16, 2008  
Shanghai International Conference Center (SICC), Shanghai, China

October 20, 2008  
Pan Pacific Yokahama Bay Hotel Tokyu, Yokohama, Kanagawa, Japan
The TSMC Technology Symposiums offer news and insights on advanced technologies; providing programs and sessions to help keep you informed. As TSMC’s early development partner, visit the Virage Logic IP experts to learn how TSMC and Virage Logic partner to provide mutual customers with integrated IP solutions for advanced technology nodes. Learn more.

Chartered Technology Forum 2008 – Shanghai
October 22, 2008
The Eton Hotel, Shanghai, China
Learn about breakthrough innovations in chip design and manufacturing, such as high-k/metal gate, design for manufacturing (DFM), and advanced technologies. Hear from industry experts about critical developments throughout the chip design process and ecosystem. Visit Virage Logic’s expert IP team to learn more about Foundry-Sponsored end-market optimized IP for 65nm. Register to attend. 

SMIC 2008 Technology Symposiums – China
October 24, 2008
Shenzhen ICC, Shenzhen, China
 

October 27, 2008
Park Plaza Beijing Science Park, Beijing, China

These symposiums are for SMIC customers, IC designers, design service providers, packaging, assembly and test engineers, quality and reliability engineers, equipment and material suppliers, universities and research institutes. As long time partners with SMIC, Virage Logic’s IP experts will be on hand to discuss how we work together to provide a variety of System-on-Chip (SoC) design solutions. Register now.

Upcoming Industry Events

As the industry’s trusted semiconductor IP partner, Virage Logic participates in a variety of global industry events to help educate the system-on-chip (SoC) design community on the latest advanced IP technology. See below for a list of upcoming events where you can hear Virage Logic’s IP experts address the complex issues facing the industry today.

Global Semiconductor Association (GSA) Expo & Conference
October 2, 2008
Santa Clara Convention Center, Santa Clara, CA

The GSA Expo & Conference will showcase the industry’s leading semiconductor suppliers including design, third-party IP vendors, foundries, and EDA companies. Don’t miss this opportunity to visit the Virage Logic IP experts to learn more about the company’s offering of advanced IP technology. Register now.

International Test Conference (ITC)
October 26-31, 2008
Santa Clara Convention Center, Santa Clara, CA

ITC attendees will learn how the leading design tool and equipment suppliers, designers, and test engineers work together helping test and design professionals address their key SoC design challenges. Virage Logic’s Dr. Yervant Zorian, VP and Chief Scientist, will host several informative tutorials and workshops during ITC. Come and meet Dr. Zorian and the Virage Logic IP experts to learn how our advanced technology can improve your yield. Learn more.

CSIA-ICCAD Annual Conference
October 28-29, 2008
Beijing International Convention Center, Beijing, China
This conference will focus on IC design, independent innovation, and collaboration as China’s IC design industry advances through interaction in the design chain. Hear Virage Logic speak on "Non-Volatile Memory on Standard CMOS Processes & Advanced DDR Controller Solutions Enable Cost-Effective Ultra-Low-Power Consumer Applications."  Register to attend.

Virage Logic Membership Has its Access Privileges

Become a Virage Logic Member for exclusive access to Foundry-Sponsored front-end design kits, application notes, silicon characterization reports, white papers, and much more! It’s easy and only takes a few minutes to become a Virage Logic Member. Sign up today and begin enjoying the benefits of Virage Logic Membership.

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Virage Logic Trusted Semiconductor IP Partner for SiWare™ Memory & SiWare™ Logic, ASAP™ Memory & ASAP™ Logic, STAR™ Memory System, STAR™ Yield Accelerator,  AEON®, NOVeA®, emPROM™ Memory System, Intelli™ DDR, Intelli™ PHY+DLL & Intelli™ Models. Copyright © 2008 Virage Logic.
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