November 2008

Welcome to the November 2008 issue of IP Times – your continuing source for semiconductor Intellectual Property (IP) news, trends, and developments. Find out about Virage Logic’s latest news and upcoming events here first. Learn more about Virage Logic’s DDR interface IP solutions in this issue.

Resource Center

New Product Video! – DDR High-Speed Interface Solutions
The new product video features Virage Logic’s all-digital PHY+DLL high-speed interface solution that leverages standard cell technology and does not require silicon validation. Watch the video to learn how this solution addresses your power issues, is easy to integrate, and helps reduce risk. View the video.

New! DDR2/3 PHY+DLL and I/O Data Sheet
Learn more about Virage Logic’s Intelli™ DDR2/3 PHY+DLL and I/O for high-performance. This is a complete, flexible, and advanced solution for ASIC and System-on-Chip (SoC) designers requiring an integrated solution for the entire physical portion of a memory interface design. Read the Data Sheet.

Virage Logic in the News

Movidia Selects Virage Logic’s Intelli™ LPDDR Interface IP Solution to Meet Stringent Mobile Video Application Requirements
Recently Virage Logic announced the mobile video processor company, Movidia, selected its low-power (LPDDR) solution to deliver optimal performance for their advanced mobile video applications. Leveraging a high-efficiency controller with a unique all-digital PHY+DLL, Virage Logic’s solution provides low-power, reduced area, and higher reliability designs for high-volume consumer and mobile electronics markets. Read more.

DDR3 Memory Targets SoC Designs – Semiconductor Applications
DRAM devices are now considered to be a commodity with prices being driven by consumer supply and demand, typically by the PC market. There are a number of factors that can affect the cost associated with DRAM components, including performance or specialty features that provide additional value. Read the article.

DDR3 Memories Aim at SoC Designs – EEbeat
Currently the market is seeing that an increase in bandwidth requirements is driving the adoption of DDR3 DRAMs. Factors that can affect the cost associated with DRAM components include performance and specialty features to provide additional value. Read the article.

Product Highlight – New Virage Logic Blog!

Topic: Managing High-Speed Interface IP Challenges
High-speed interfaces consume a significant amount of power and created a very noisy system level environment, which can lead to potential signal integrity issues.  If the potential signal integrity issues are not managed properly in the design of the IP and the design of the system, system level failures may occur that may not be present at silicon test.  Log in to share your opinion on this topic.

Upcoming VIP Partner Events

Virage Logic’s VIP Partner Program brings together technology and business alliances with our industry partners for the benefit of our mutual customers. As part of the VIP Partner Program, Virage Logic supports our partners’ global events, such as the ones listed below.

SMIC 2008 Technology Symposium

November 18, 2008
Shinagawa Conference Center, Tokyo, Japan

This symposium is for SMIC customers, IC designers, design service providers, packaging, assembly and test engineers, quality and reliability engineers, equipment and material suppliers, universities and research institutes. As long time partners with SMIC, Virage Logic’s IP experts will be on hand to discuss how we work together to provide a variety of SoC solutions to meet your design needs. More information.

TSMC 2008 Technology Symposium
December 2, 2008
Daniel Hotel, Herzelia, Israel

The TSMC Technology Symposium offers news and insights on advanced technologies; providing programs and sessions to help keep you informed. As TSMC’s early development partner, visit the Virage Logic IP experts to learn how TSMC and Virage Logic partner to provide mutual customers with integrated IP solutions for advanced technology nodes. Learn more.

Upcoming Industry Events

As the industry’s trusted semiconductor IP partner, Virage Logic participates in a variety of global industry events to help educate the SoC design community on the latest advanced IP technology. See below for a list of upcoming events where you can hear Virage Logic’s IP experts address the complex issues facing the industry today.

IP 08 Conference – IP-Based Electronic System Conference & Exhibition
December 3-4, 2008
World Trade Center, Grenoble, France

The IP 08 Conference, hosted by Design & Reuse, will feature hot topics in the design world with a special focus on IP-based SoC design technology. Virage Logic’s VP and Chief Scientist, Dr. Yervant Zorian, will be a featured speaker in the seminar, “IP for In-System Silicon Validation and Debug.” Learn More.

Virage Logic Membership Has its Access Privileges

Become a Virage Logic Member for exclusive access to Foundry-Sponsored front-end design kits, application notes, silicon characterization reports, white papers, and much more! It’s easy and only takes a few minutes to become a Virage Logic Member. Sign up today and begin enjoying the benefits of Virage Logic Membership.

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