January 2008

Welcome to the January 2008 issue of IP Times - your continuing source for semiconductor Intellectual Property (IP) news, trends, and developments.
IP Times January Highlights:

• How to Select the Best DDR Memory Controller
• DesignCon 2008, February 5-6, Santa Clara, California
• Virage Logic Offers STAR™ Memory System Training February. 5-6

Semiconductor IP Resource Center

As the semiconductor industry's trusted IP partner, Virage Logic is pleased to provide an article in this issue that focuses on how designers can select the best Double Data Rate (DDR) memory controller.

Article - How to Select the Best DDR Memory Controller
By Raghavan Menon and Raj Mahajan, Virage Logic

A designer has two alternatives for the implementation of a DDR memory controller for a System-on-Chip (SoC). The controller may be designed in-house, or it may be purchased from a third-party semiconductor IP provider as an IP core. The purchase of third-party controller IP has become a popular choice for several reasons; probably the most compelling is that the design, verification, testing and integration of a memory controller is a very complex, costly, and risky task for someone who has little experience in the nuances of these types of subsystems. Furthermore, the DDR standards, and standards testing, are relatively stable today and an in-house design offers little opportunity for differentiated value to the SoC. The purchase of an IP core is also much less expensive in the long run, helps reduce schedule risk, and allows the design team to focus their efforts on the core differentiating features of the product.
Read More

Upcoming Events

DesignCon 2008, February 5-6
Santa Clara Convention Center, Santa Clara, California
Virage Logic Exhibit is at Booth #725

Visit the Virage Logic booth (#725) at this year's DesignCon 2008 and learn about our latest DDR interface IP that offers solutions supporting several DDR protocols ranging from high performance DDR3 to low power MDDR. Our IP experts will show you how the Virage Logic DDR solution can meet the needs of systems that require efficient access to off-chip DRAMs. Sign up for your chance to win a Garmin Nuvi 200 GPS at the Virage Logic booth.

Don't miss an informative panel discussion on "Managing Unit Costs: Methodologies and Processes to Lower Overall Chip Costs." Pete Rodriguez, Virage Logic's Chief Marketing Officer (CMO), will be participating in this panel that will explore the different approaches being used to ensure the economic viability of a chip project. What roles do IP, reuse, designers, design methodologies, and manufacturing options play? How much impact does each have on managing the cost of a packaged IC? How do the different components that contribute to a chip collaborate to ensure the best decisions are made when trading off performance, power, area, and cost? What can be done better? Rodriguez and other panelists will examine what can be done to approach IC unit cost from areas other than IP and manufacturing licensing/manufacturing costs.
Check out the complete DesignCon show schedule at:
http://www.designcon.com/2008/conference/schedule.html

Magma Users Group (MUSIC), February 28, 2008
Santa Clara Convention Center, Santa Clara, California

The Magma Users Summit on Integrated Circuits (MUSIC) is dedicated to providing an open forum for users to share and exchange ideas on how they meet the challenges of IC and SoC design. The MUSIC 2008 conference program will feature tutorials, presentations, keynotes, and a Partners Fair where Virage Logic's IP experts will be exhibiting. Register Now.

Education

Virage Logic Customer Education Program
Virage Logic is committed to helping customers achieve maximum results with our products and services. The company's Customer Education Program provides both online tutorials and in-depth courses that are comprised of a series of lectures and hands-on labs to reinforce the training material and provide an optimum learning experience. Virage Logic's instructors are experienced SoC designers and IP experts with extensive backgrounds in customer support and education.

STAR™ Memory System Hands-on Training Course - February 5-6, 2008 Fremont, California
Deadline to Register is January 29, 2008 
Sign up for the upcoming STAR Memory System class. This hands-on technical course features lectures and labs conducted by Virage Logic's memory IP experts who will teach you how the Self-Test and Repair (STAR) Memory System can help you achieve superior test and repair coverage for your embedded memory designs. STAR Memory System customers have experienced up to a 250 percent yield improvement. So don't miss this opportunity to learn how you too can leverage the system's advanced embedded test and repair capabilities to optimize your yield and preview the latest features in release 3.5 of the STAR Memory System. Upon completion of the course, users will have a thorough understanding of the STAR Memory System and how they can design and implement an integrated embedded memory test and repair solution into their SoC designs.

User Benefits of Attending the STAR Memory System Course are the following:

• Gain detailed knowledge of the concepts that are required to understand the STAR Memory System and effectively use the product.
• Develop a detailed understanding of how to create and implement the STAR Memory System into SoC design to lower test costs, improve yield, and shorten time-to-manufacture (TTM).
• Immediately be able to begin the planning process and tailor a user's STAR Memory System for their SoC design requirements and accelerate time-to-market (TTM).

New and Existing Users Should Attend
The STAR Memory System course is designed with both new and current users in mind. New STAR Memory System users will gain a thorough understanding of the system's capabilities and how they can best utilize these to achieve superior test and repair coverage for embedded memories. Existing STAR Memory System users will also gain useful insights, providing them with a deeper understanding of the advanced capabilities of the product. Register now.

Customer Support

Virage Logic's Award Winning Customer Support Services Include Easy, On-line Access to Technical Documentation
In addition to providing a broad range of support services,Virage Logic's global Customer Support Team offers easy online access to the most up-to-date technical documentation. This first-level support system is key to rapid silicon IP integration and successful design implementation. For more information or to become a registered customer, please contact your local Virage Logic Field Applications Engineer. Virage Logic customers can access the Web Support area here.

Virage Logic Membership Has its Access Privileges

New to Virage Logic? Become a Virage Logic Member and gain access to the Members' Web site, which offers free front-end design kits, literature, application notes, silicon characterization reports, and much more. In fact, we're pleased to announce the availability of new Application Specific IP (ASIP) technical collateral including application notes, data sheets, and white papers. They are available now for download but you must be signed up as a Virage Logic Member. Sign up today and begin enjoying the benefits of being a Virage Logic Member.

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