February 2008

Welcome to the February 2008 issue of IP Times – your continuing source for semiconductor Intellectual Property (IP) news, trends, and developments from the semiconductor industry’s trusted IP partner.

IP Times February Highlights:

• Free Virage Logic IP is Just a Mouse Click Away
• Critical Design and Manufacturing Challenges at 45nm  
• How to Select a DDR Memory Controller
• Magma Users Group (MUSIC) Partner Fair – February 28
• International Symposium on Quality Electronic Design (ISQED) – March 17-19
• Synopsys Users Group (SNUG) Interoperability Fair – April 1  

Semiconductor IP Resource Center

This section features an article on Virage Logic’s Foundry Pays IP – offered for a variety of foundries and processes.

Article – Free Virage Logic IP is Just a Mouse Click Away
By Dan Nenni, Director of Strategic Foundry Relationships, Virage Logic

As the semiconductor IP market approaches an impressive $2 billion in 2008, business delivery models continue to evolve. What has emerged is a more scalable, hybrid IP business model that features non-recurring engineering (NRE) costs paid by the foundries for their customers  This no-cost model benefits both new and established semiconductor design companies by providing them with easy access to a variety of silicon proven IP for a wide range of process nodes. Virage Logic’s no-cost Foundry Pays program works in collaboration with a broad range of foundry partners – including Chartered, Dongbu HiTek, SilTerra, SMIC, Tower, TSMC, and UMC – in a common commitment to deliver quality IP for a selection of process technologies. This collaboration offers comprehensive and seamless solutions to meet our mutual customers' needs.

As part of Virage Logic's Foundry Pays program, the company offers a variety of Front-End Design Kits that include silicon proven embedded memories, logic libraries and I/Os that are optimized for each foundry. Virage Logic’s Foundry Pays Front-End Design Kits are available to qualified customers at no-cost and are just a mouse click away. Click here for a complete selection of Virage Logic's Foundry Pays offerings.

Virage Logic in the News

Article – Critical Design and Manufacturing Challenges at 45nm  
Wireless Design and Development – February 2008
By Brani Buric, Vice President, Product Marketing and Strategic Foundry Relationships, Virage Logic

Portable devices have become a driving force behind the rapid acceleration of new silicon process technologies. A few years ago, a new generation of cell phones was developed using 65nm technology. Today, all leading cell phone developers are creating a new generation of devices that target 45nm or 40nm process nodes. From a design standpoint, power has emerged as the dominant constraint limiting integration with significant challenges in both active and standby power. Read More.  Link coming from McBru. Will hold distribution of IP Times until link is available, probably on or before Feb. 19.

Article – How to Select a DDR Memory Controller
SCD Source – February, 2008
By Raj Mahajan, Staff Engineer and Raghavan Menon, Senior Director Virage Logic

As SoC designs have grown in complexity, each design has taken on the characteristics of a complete system. Processing elements, on-chip busses, a host of peripheral interfaces and specialized algorithmic logic are included on a single chip. To keep all these elements working smoothly, a high performance memory interface is almost always required.

Memory subsystems may be used as frame buffers for image processing, data buffers in network routers, or to store sounds and pictures in consumer applications such as cell phones and digital cameras. This means the SoC will need a memory controller targeted for flash, DDR2, DDR3, Mobile DDR or graphics DDR memories. Read More.

Upcoming Events

Magma Users Group (MUSIC) – February 28, 2008
Santa Clara Convention Center, Santa Clara, California

Virage Logic will be presenting a technical paper entitled, “Advanced Low-Power Features for System-on-Chip (SoC) Design“ at the upcoming Magma Users Group on February 28, 2008. The paper will feature next-generation power-aware embedded memories and standard cells to help reduce active and leakage power consumption of SoCs.

The company will also be exhibiting at the MUSIC Partner Fair where our IP experts will be on hand to discuss how you can accelerate your silicon success with our broad portfolio of Silicon Aware IP^TM.
Register Now.

International Symposium on Quality Electronic Design (ISQED) – March 17-19, 2008
Double Tree Hotel, San Jose, California

Don’t miss the upcoming ISQED conference where you can meet Dr. Yervant Zorian, Virage Logic’s Vice President and Chief Scientist, who will be featured on the Design for Manufacturability (DFM) panel. Dr. Zorian is a recognized pioneer for DFM and Design for Yield (DFY) in the industry. Register Now.

Synopsys Users Group (SNUG) – April 1, 2008   
Santa Clara Convention Center, Santa Clara, California

Virage Logic will be a featured Gold Sponsor at the upcoming SNUG conference this year. Stop by the Virage Logic booth at the Interoperability Fair to meet with the industry’s foremost IP experts and learn more about the company’s broad portfolio of silicon proven semiconductor IP.   Register Now.

Education

Virage Logic Customer Education Program – New Class May 6-7, 2008
Learn the latest techniques, tips, and tricks! Sign up today for Virage Logic’s upcoming Self-Test and Repair (STAR^TM ) Memory System training class. This extensive two-day course features lectures, hands-on tutorials, and labs to help you integrate the STAR Memory System into your designs quickly and accelerate your silicon success.  Register Now.

Customer Support

Virage Logic’s Award Winning Customer Support Services Include Easy, On-line Access to Technical Documentation
In addition to providing a broad range of support services, Virage Logic’s global Customer Support Team offers easy online access to the most up-to-date technical documentation. This first-level support system is key to rapid silicon IP integration and successful design implementation. For more information or to become a registered customer, please contact your local Virage Logic Field Applications Engineer. Virage Logic customers can access the Web Support area here. 

Virage Logic Membership Has its Access Privileges

New to Virage Logic? Become a Virage Logic Member and gain access to the Members’ Web site, which offers no cost front-end design kits, literature, application notes, silicon characterization reports, and much more. In fact, we’re pleased to announce the availability of new Application Specific IP (ASIP) memory controller technical documentation that includes application notes and white papers. These are available now for download – but you must be a Virage Logic Member. Sign up today and begin enjoying the benefits of Virage Logic Membership.

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