December 2008

To Our Customers, Partners and Colleagues –
In appreciation of our association during the past year, we extend our best wishes for the Holiday Season and look forward to a successful New Year –

Welcome to the December 2008 issue of IP Times – your continuing source for semiconductor Intellectual Property (IP) news, trends, and developments. This special year-end edition features some of our most popular articles, papers and presentations showcased in previous issues this year. So if you happened to miss an issue of IP Times, this is your opportunity to get caught up.

Resource Center

Non-Volatile Memory Options in Portable Design – Portable Design
Selecting the right non-volatile memory (NVM) can dramatically impact both the power profile and the price of your portable design. Learn about the key advantages and disadvantages of the various options available for system designers to include NVM in their portable designs. Read more.

Virage Logic in the News

The Strong Get Stronger In Recession – Forbes.com
In this recent article, Virage Logic was profiled along with HP, Intel and Synopsys, as companies that are growing stronger during the recession. Read more.

Expanded Global Sales Channel Addresses Growing Market Demand for Broad Product Portfolio
The company recently announced the addition of five new representative firms in Silicon Valley, France, Italy, Israel, Scandinavia, the United Kingdom and Japan to help meet growing market demand in those regions for Virage Logic’s expanding product offerings. Read the article.

Virage Logic Proposes to Acquire LogicVision
Virage Logic recently announced that a proposal was sent to the Board of Directors of LogicVision Incorporated, to acquire the company for a cash sum. The potential acquisition would help further expand Virage Logic’s product portfolio in the embedded test and repair market. Read the article.

CHiL Semiconductor Selects Virage Logic’s Flexible AEON® Non-Volatile Embedded Memory
Virage Logic announced that CHiL Semiconductor, an innovative developer of mixed-signal power-management ICs, has licensed the company's AEON solution – a multiple-time programmable (MTP) NVM optimized to meet the needs of digital power management products. Read the article.

The Best of 2008 – Articles, Presentations, Videos

How to Select a DDR Memory Controller – SCD Source, February 2008
Some of the obvious criteria such as performance, area, cost, power and latency need to be factored in, but using a data traffic “efficiency” metric (bandwidth delivered/theoretical maximum bandwidth) has proven to be the single most important criterion for a wide range of applications. Read the article.

Critical Design & Manufacturing Challenges at 45nm – Wireless Design & Development,
February 2008
Critical design and manufacturing challenges at 45-nanometer ( nm) are driving the need for a new generation of IP that will provide the flexibility and "dash board control” to effectively manage the tradeoffs for performance, power, area and yield. Designs targeting 45nm will further emphasize requirements for rigorous power savings starting at the system level. Read more.

Improving Yield With Retooling and Robust Infrastructure – Evaluation Engineering, March 2008
As production ramps from first silicon to full volume, the product yield becomes a significant contributor to overall company success. It’s becoming more difficult to achieve adequate yield, much less work on yield improvement, at advanced process technologies. Learn more.

Advanced Low-Power Features for SoC Design – Magma MUSIC Presentation, March 2008
Virage Logic presented a technical paper entitled, “Advanced Low-Power Features for System-on-Chip (SoC) Design” at the Magma Users Group. The paper features next-generation power-aware embedded memories and standard cells that help reduce active and leakage power consumption of SoCs.
View the presentation.

Virage Logic’s Dan McCranie Says IP is Alive and Well – EE Times Video, June 2008
This exclusive video features Dan McCranie, Virage Logic’s Executive Chairman, talking about the outlook, challenges and trends in IP. View the video.

Dr. Alex Shubat Discusses IP Industry Growth – International Engineering Consortium Video, June 2008
Virage Logic’s Co-founder, President and CEO is interviewed about the industry and the company’s growth strategy. View the video.

Comparing an IP-Centric DDR Solution With a System-Centric DDR Solution for Improved System Performance – SOC Central, September 2008
A typical IP-centric approach is no longer sufficient to meet today's aggressive goals for system performance, cost, power, and manufacturability. An approach that addresses system-level concerns and delivers a combination of system capabilities required to optimize the system for target markets is required. Read the article.

Upcoming Industry Events

As the industry’s trusted semiconductor IP partner, Virage Logic participates in a variety of global industry events to help educate the SoC design community on the latest advanced IP technology. See below for a list of upcoming events where you can hear Virage Logic’s IP experts address the complex issues facing the industry today.

VLSI Design Conference – Embedded Systems Conference
January 5-9, 2009
Taj Palace Hotel, New Delhi, India
This joint conference is a forum for researchers and designers to present and discuss various aspects of VLSI design, electronic design automation, enabling technologies, and embedded systems. Virage Logic will be a featured speaker presenting, “Memory Power Reduction/Low-Power Techniques.” Learn more.

DesignCon 2009 & IP Summit
February 2-4, 2009
Santa Clara Convention Center, Santa Clara, California
Virage Logic will feature a live demo in booth #301 showcasing its 1600Mbps DDR3 memory system running on a SoC using the company’s Intelli™ DDR2/3 Controller and Intelli™ DDR2/3 PHY+DLL and I/O. Stop by the booth to view the demo and be entered for a chance to win a Garmin GPS!

Virage Logic is also chairing a DesignCon technical panel on “Selecting IP in a Complex Design Environment,” and will be a featured speaker on a technical panel entitled, “How Can Semiconductor Designers Meet High-Performance/Low-Power Requirements for Customers by Providing Greater Choice at Advanced Technology Nodes?” Don’t miss this opportunity to learn more about Virage Logic’s advanced IP and meet with the company’s IP experts at DesignCon 2009. Register to attend.

Virage Logic Membership Has its Access Privileges

Become a Virage Logic Member for exclusive access to Foundry-Sponsored front-end design kits, application notes, silicon characterization reports, FAQs, white papers, and much more! It only takes a few minutes to become a Virage Logic Member. Sign up today and begin enjoying the benefits of Virage Logic Membership.

Don’t Miss the January Issue of IP Times – Kick-off the New Year Right!

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